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Finite field arithmetic has been extensively used in error correcting codes and cryptography. Low‑complexity and high‑speed designs for finite field arithmetic are needed to meet the demands of wider bandwidth, better security and higher portability for personal communication device. In particular, cryptosystems in GF(2m) usually require computing exponentiation, division, and multiplicative inverse, which are very costly operations. These operations can be performed by computing modular AB multiplications or modular AB2 multiplications. To compute these time-consuming operations, using AB2 multiplications is more efficient than AB multiplications. Thus, there are needs for an efficient AB2 multiplier architecture. In this paper, we propose a low latency Montgomery AB2 multiplier using redundant representation over GF(2m). The proposed AB2 multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the proposed AB2 multiplier saves at least 18% area, 50% time, and 59% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as exponentiation, division, and multiplicative inverse.
